Azure Cobalt 200 Boosts EDA Workload Performance

Introduction

Microsoft is using Azure to design Azure silicon, and its latest results point to a notable step forward for engineering workloads. The company says Azure Cobalt 200, built on Arm Neoverse CSS V3, delivers strong gains for electronic design automation (EDA) jobs that are central to chip design, verification, and signoff.

For organizations running large-scale semiconductor or compute-heavy design workflows in Azure, these results matter because EDA performance depends on predictable per-core throughput, memory bandwidth, and the ability to scale quickly during peak project phases.

What’s new with Azure Cobalt 200 for EDA

Microsoft evaluated Cobalt 200 against Cobalt 100 and selected x86 Azure VM options across several internal silicon development workloads. Key results include:

• Overall gains: Evaluated EDA workloads ran 1.30x to 4.15x faster than on Cobalt 100, depending on the scenario.
• Digital simulation:
  • Cadence Xcelium and Synopsys VCS delivered more than 40% higher throughput per logical core than any other tested system.
• Analog and mixed-signal simulation:
  • Cadence Spectre showed 38% higher throughput per logical core generation over generation.
  • It also exceeded tested x86 Azure VMs by 11% to 52%.
• Physical verification:
  • Siemens Calibre DRC completed with 23% lower wall time, equal to 1.30x relative performance versus Cobalt 100.
• Static timing analysis:
  • Synopsys PrimeTime achieved 2x the peak throughput per logical core of Cobalt 100.

Microsoft also noted that tools already enabled on Cobalt 100 ran unmodified during Cobalt 200 evaluation, reducing migration friction for testing.

Why this matters for Azure customers

EDA workloads are notoriously demanding. Simulation, verification, and signoff jobs often run concurrently across many cores and require consistent performance under heavy load. Microsoft attributes Cobalt 200’s gains to platform characteristics such as:

• Physical cores without hyperthreading overhead
• Dedicated 3 MB L2 cache per core
• High provisioned memory bandwidth

Combined with Azure’s elastic capacity and high-performance storage, this can help engineering teams scale regression farms and signoff runs without maintaining oversized on-premises infrastructure.

Impact on IT and engineering teams

For IT administrators and CAD managers supporting chip design environments, the practical benefits include:

• Better throughput for overnight regressions
• More predictable performance at high VM utilization
• Faster turnaround for milestone-driven verification and tapeout activities
• Greater flexibility to provision compute only when needed

Next steps

If your organization runs semiconductor design, verification, or other HPC-style engineering workloads in Azure, consider:

• Reviewing Azure Cobalt 200 VM availability and sizing
• Benchmarking your supported EDA tools on Cobalt-based instances
• Comparing throughput-per-core and wall-time metrics against existing x86 or Cobalt 100 deployments
• Evaluating storage and capacity planning for burst-heavy project phases

Azure Cobalt 200 appears to be a meaningful platform update for EDA teams looking to improve performance and efficiency in the cloud.